Summary
Overview
Work History
Education
Skills
Websites
Projects
Nameinchinese
Project
Languages
Timeline
Generic
BETSALEEL HENRY

BETSALEEL HENRY

Hsinchu

Summary

Proactive and goal-oriented professional with a strong emphasis on time management and problem-solving. Recognized for reliability and adaptability, demonstrating a quick ability to learn and apply new skills. Committed to utilizing these qualities to drive team success and make valuable contributions to organizational growth.

Overview

1
1
year of professional experience

Work History

Digital (IC) Design Intern

NOVATEK Microelectronics
07.2024 - 08.2024
  • Developed and executed test plans for block-level verification of Image Processing Intellectual property cores (IPs), achieving 85% coverage for two critical IPs within the project timeline.
  • Assisted in conducting Universal Verification Methodology (UVM) based tests for designed IP cores against variations, gathering data to inform decision-making processes with designers.
  • Collaborated with Design teams to resolve power and performance issues, and organized synthesis logs for efficient assessments.
  • Contributed to a positive work environment through effective communication and collaboration with colleagues.
  • Improved project visuals with creation of custom graphics and illustrations.

AI Intern

GLIACLOUD
02.2023 - 04.2023
  • Conducted thorough unit testing to ensure project specifications were met, leading to consistently high-quality outputs.
  • Developed an incentive feature to segment users based on service usage and preferences leading to more returning customers.
  • Debugged and refined codebase to improve software performance while maintaining high-quality standards within the team.
  • Developed custom Python scripts for data preprocessing tasks, streamlining the Bert model training process on some French language corpus.


Education

Master of Science - Electrical Engineering and Computer Science (EECS)

NATIONAL YANGMING CHIAOTUNG UNIVERSITY
06.2025

Bachelor of Science - Electrical and Computer Engineering (ECE)

NATIONAL YANGMING CHIAOTUNG UNIVERSITY
Hsinchu, Taiwan
06.2023

Skills

  • Teamwork and collaboration
  • Problem-solving aptitude
  • Fast learner
  • Research
  • Outstanding communication skills
  • Public speaking

Projects

Image differentiator AI Accelerator, Integrated Circuit Laboratory Course Project, 09/23, 01/24, Designed and verified the Verilog-based AI accelerator, reducing latency by 3.8x with minimal area overhead., Optimized power consumption by implementing a gated OR clock technique, leading to a 35% reduction in power use while only 5% area increase., Utilized jaspergold for formal verification, Verdi for debugging and visualization, and PrimePower for power and performance trade-off analysis. Reduced Instruction Set CPU, Integrated Circuit Laboratory Course Project, 11/23, 02/24, Designed a 5-stage pipelined processor (RTL to GDSII) with multi-level cache integration (SRAM, DRAM, internal registers), improving memory access latency and optimizing throughput., Applied power-aware design techniques, including clock gating, and utilized SystemVerilog Assertions, achieving over 80% functional coverage., Employed firmware and OS integration concepts to manage memory and ensure cache coherence, utilizing the MESI protocol. Circuit Node Analysis, Computer Aided Circuit Design and Automation Course Project, 09/22, 01/23, Developed an Electronic Design Automation (EDA) tool in C++ code that parsed circuit netlists, incorporating components such as BJTs and MOSFETs using small-signal models for circuit analysis., Implemented Modified Nodal Analysis (MNA) to calculate and generate reports of node voltages and branch currents. Virtual Kart, Embedded systems course Project, 02/22, 09/22, Collaborated with two peers to develop a Deep Reinforcement Learning Agent for autonomous navigation of a virtual self-driving kart in Python/PyTorch, based on continuous control mechanism, Proportional, Integral, Derivative (PID) tuning., Dealt simultaneously with complex environmental dynamics and a complex policy, derived from streamed frame pixels.

Nameinchinese

李松磊

Project

Custom Assistant: Llama model on Raspberry Pi

Embedded systems Project    09/2023– 01/2024

· Compressed the Llama2 7B model to 40% of its original size using activation-aware weight quantization (AWQ).

· Improved 70% accuracy on Winogrande downstream tasks with only 5% corpus via lightweight fine-tuning on an NVIDIA GeForce RTX 3090 GPU. 

· Deployed the compressed model on a Raspberry Pi  (2.4 GHz processor) for inference with the utilizing llama.cpp library; 

·  Wrote shell script and ssh migrations to handle prompt passed to the model, used Django backend for user interaction.

Electronic Circuit Node Analysis

Computer Aided Circuit Design and Automation Project  09/2022– 01/2023

· Developed an Electronic Design Automation (EDA) tool in  C++ that parsed circuit connections in a netlist.

· Achieved less than 10 Second latency, and support for components such as BJTs and MOSFETs using their small-signal models.

· Implemented Modified Nodal Analysis (MNA) to compute and generate comprehensive reports of voltages and currents.

Reinforcement Learning Virtual Kart

Embedded systems Project   02/2022– 09/2022

· Collaborated with two peers to develop a Deep Reinforcement Learning Agent on Jetson Nano, for autonomous navigation of a Kart in Python, based on continuous control mechanism, Proportional, Integral, Derivative (PID) tuning.

· I Dealt simultaneously with complex environmental dynamics and our complex policy, derived from streamed frame pixels.

Languages

French
Native language
English
Proficient
C2
Chinese (Mandarin)
Upper intermediate
B2

Timeline

Digital (IC) Design Intern

NOVATEK Microelectronics
07.2024 - 08.2024

AI Intern

GLIACLOUD
02.2023 - 04.2023

Master of Science - Electrical Engineering and Computer Science (EECS)

NATIONAL YANGMING CHIAOTUNG UNIVERSITY

Bachelor of Science - Electrical and Computer Engineering (ECE)

NATIONAL YANGMING CHIAOTUNG UNIVERSITY
BETSALEEL HENRY