CHENG-YEN TSAI

• Resolved critical issues during system integration phases, ensuring seamless transitions between design iterations.

Ex: Vatics EVB-M5S / MSIZ97 MPOWER, Solve the problem in 10 work days.

Ex: MTK7988, Retention unstable half year project, find out root cause.

• Established strong working relationships with Japanese designers through exceptional communication skills, fostering trust and collaboration.

Ex : JD co-work : Kestrel4(20nm DDR3) CPR, Muses(16nm DDR4) on-going

• Improved team productivity by providing technical guidance and mentoring junior engineers.

Ex: Develop auto-DA system&SOP, reduce the 90% verify time.

Ex: Lead team to finish D20nm new product verification in 8 weeks.

• DDR2/DDR3/DDR4 verification experience

Ex: Cadmus2/3 (512Mb, DDR2), Wega3/4 (2Gb,DDR3), Kestrel/2/4 (4Gb,DDR3)

• Advantest Training instructor -T5833ES (Certification from Advantest)T5000 series ATL programming Elementary Training

Ex: Training the dept member T5833ES half year 80% member can use the T5833ES analysis failure fluently.

• KGD (Known Good Die), RMA support / Yield improvement

Ex: Redundancy issue due to ass'y rubber. (20% failure ratio -> 0%)

Ex : KGD FT, different stage correlation : 95%

Ex: KERF yield improve for DDR2/DDR3 (From 1500ppm->under 150ppm

Ex: WLBI development : Sub-Vt leakage (WLBIDCA, VBLH-VSS max)

• DRAM PFA locate the failure point : Delayer, Layout,

Ex: 50up case in half year for 2 years.