Chia Jhe Hsu
Semiconductor Process, Physics And Devices
Kaohsiung City,KH
Summary
Experienced process integration with over 3~4 years of experience in UMC. Excellent reputation for resolving problems and improving customer satisfaction.
Overview
4
4
years of professional experience
6
6
years of post-secondary education
Work History
Senior 28nm Process Integration Enginner
Enginner
Tainan, TW
01.2019 - Current
- Working closely with production, and execution of all manufacturing related changes
- Handling the 2 major 28nm generation products in high volume of production
- Solving ~11 low yield cases and successfully prevented it
- Yield improvement ~ 5% in the 2 major products
- Executing 3 BKM migration projects and successfully cost down ~2 % benifits for my company
- Knowledge of statistical methods to perform data analysis
- Constantly publishing module updates and key project status updates
R&D DRAM Process Integration Enginner
Engineer
Tainan, TW
01.2018 - 12.2018
- Successfully develop 32nm DRAM and import mass production
- Successfully develop buried word line process in 25nm DRAM generation
- Coordinating and communicating the execution of process module improvement strategy
- Analyze materials electrically, physically, etc. and work with process groups to select new materials and directions for development
Education
Master - Institute of Electro-Optical Engineering
National Chiao Tung University
Taiwan,Hsinchu 09.2015 - 09.2017
Bachelor - Electro-Optical Engineering
National Chiao Tung University
Taiwan, Hsinchu 09.2011 - 06.2015
Skills
Designing and executing quality EXP to improve process performance and capability
Good understanding and implementation of troubleshotting methods
Talent in communication with cross-functional teams to manage to solve problems
Strong data analysis (and statistical analysis) skills in yield , WAT and inline
Self-motived ,organized, and also a highly effective in a team setting
Updating status and direction of key projects
Timeline
Senior 28nm Process Integration Enginner
Enginner
01.2019 - Current
R&D DRAM Process Integration Enginner
Engineer
01.2018 - 12.2018
Master - Institute of Electro-Optical Engineering
National Chiao Tung University
09.2015 - 09.2017
Bachelor - Electro-Optical Engineering
National Chiao Tung University
09.2011 - 06.2015