Chifeng Huang
Business Model: Design And Process Friendly Analog/RF Technology
Hsinchu,Taiwan
Summary
Customer-focused professional with successful 24-year career in Analog/RF sector. Dynamic successful applying problem-solving and innovative technology in busy business environment.
Overview
24
24
years of professional experience
2
2
years of post-secondary education
Work History
Product Department Manager
TSMC
Hsinchu, Taiwan
07.2007 - Current
- Defeat competitor and won ISP business from 1st-tier CIS company by RTS noise improvement 50% in 3 months. Additional RTS improvement 25% enriched client's marketing strategy on PPA.
- Identified RTS caused product failure and then improved failure rate (40-> 90+% in 4 months) of 1st-tier TWS company. Helped customer to win trust back from their end-customers.
- Initiated and enhanced analog design friendly ecosystem (Model, DRC, Monitoring and Process for RTS noise and mismatch)
- Analog lead (PE/BD/DTP/Fabs) and responsible for 0.18~N4
R&D Section Manager
TSMC
Hsinchu, Taiwan
07.1998 - 06.2007
- Standardize tsmc's analog test pattern, characterization methodology and model targeting SOP
- Offered analog guidelines on mismatch, noise and RF
- Leveraged TCAD for noise engineering and analysis
Education
Master of Science - Electronic Engineering
Chun-Yuan Christian Univ.
Chun-Li, Taoyuan, Taiwan 09.1994 - 06.1996
Skills
- Cross-team management (Customer/BD/PE/SPICE/RA/Fab)
Timeline
Product Department Manager
TSMC
07.2007 - Current
R&D Section Manager
TSMC
07.1998 - 06.2007
Master of Science - Electronic Engineering
Chun-Yuan Christian Univ.
09.1994 - 06.1996
Award
- TSMC TQE gold medal from QRA VP on customer satisfactory, 2018
- 4 awards from CEO on tsmc idea forum (2011-2017). 1st gold medal in product team.
- Best team award from Operations SVP, 2017
Award
- TSMC TQE gold medal from QRA VP on customer satisfactory, 2018
- 4 awards from CEO on tsmc idea forum (2011-2017). 1st gold medal in product team.
- Best team award from Operations SVP, 2017
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