Chiou Yishin
Pcb Layout
Taipei
Summary
PCB Layout Engineer with experience in server-related hardware design using Cadence Allegro and OrCAD.
Skilled in full PCB design flow including placement, routing, constraint setup, and layer stack-up planning.
Strong background in high-speed signal routing with focus on signal integrity (SI), impedance control, and noise reduction.
Experienced in multi-layer PCB design and cross-functional collaboration with mechanical and electrical teams to ensure design feasibility and manufacturability.
Overview
3
3
years of professional experience
Work History
Pcb Layout Engineer
Advantech
11.2022 - 08.2025
- Managed small- to medium-sized projects and server-related operations.
- Coordinated multiple concurrent projects with strong prioritization and time management skills.
- Independently completed small- to medium-scale assignments with high efficiency and accuracy.
Pcb Layout Engineer
Foxconn
02.2022 - 08.2022
- Designed PCB layouts using Cadence Allegro and OrCAD, primarily focusing on server-related projects.
- Responsible for small-board designs, including both AC and DC boards, based on mechanical drawings and schematics.
- Performed design verification using Mentor Graphics Valor.
- Experienced in PCB workflow including net-in, board outline creation, constraint setup, layer stack-up definition, high-speed routing, single-ended routing, tuning, silkscreen, and Gerber file generation.
- Specialized in high-speed signal routing, ensuring proper impedance control and spacing to minimize noise interference.
- Evaluated layer stack-up strategies for new board designs to optimize routing and signal integrity while maintaining cost efficiency.
- Gained hands-on experience in balancing design constraints, performance requirements, and manufacturing limitations to deliver stable and high-quality PCB designs.
Education
Bachelor’s Degree - Electrical Engineering
Chang Gung University
Guishan Dist., Taoyuan City, Taiwan06.2021
Skills
- Experienced in PCB layout design using Cadence Allegro and OrCAD for server-related hardware projects
- Responsible for component placement and routing based on schematic and mechanical constraints for AC/DC board designs
- Proficient in full PCB design flow including net-in, floorplanning, board outline, constraint setup, layer stack-up definition, and Gerber generation
- Strong experience in high-speed signal routing with focus on signal integrity (SI), impedance control, and noise reduction
- Familiar with multi-layer PCB stack-up planning to balance performance, manufacturability, and cost
- Conducted layout verification and design rule checks using Mentor Graphics Valor
- Capable of handling multiple concurrent projects with strong time management and prioritization skills
Timeline
Pcb Layout Engineer
Advantech
11.2022 - 08.2025
Pcb Layout Engineer
Foxconn
02.2022 - 08.2022
Bachelor’s Degree - Electrical Engineering
Chang Gung University