Summary
Overview
Work History
Education
Skills
Publications
Patent
Honors & Awards
Courses
References
Timeline
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Eknath Sarkar

Graduate Research Assistant
4F, No. 47, Bao'an Rd., Yonghe Dist., New Taipei City, Taiwan (R.O.C.)234,U.S.A, Taiwan

Summary

I am a 2nd year Ph.D. student at National Taiwan University. I have worked as a Senior Engineer in the R&D division with almost 3 years of working experience in the field of 'Thin-Film Development.' My current research area consists of fabrication, characterization, and reliability (PBS, NBIS, etc.) study of planar and gate-all-around (GAA) TFTs using amorphous oxide semiconductors (IGZO, In2O3, etc.) as the channel material

Overview

5
5
years of professional experience
8
8
years of post-secondary education

Work History

Graduate Research Assistant

National Taiwan University
Taipei, Taiwan
09.2021 - Current
  • Deposition, characterization, and electrical properties optimization of metal-oxide thin-films (IGZO, In2O3, etc.).
  • Fabrication of Gate-All-Around (GAA) TFT using a-IGZO as the channel.
  • Reliability analysis (PBTI, NBIS, etc.) of a-IGZO TFTs.
  • Completed administrative and research duties per professor's request.
  • Recorded data and maintained source documentation following good documentation practices.
  • Performed statistical, qualitative and quantitative analysis.

Process Development Intern

Nanya Technology Corporation
New Taipei City, Taiwan
07.2022 - 08.2022
  • Supported word line process integration module to overcome word line trench etching challenges.
  • Optimized dry etching recipe of word line trench etch to get desired trench shape.
  • Used statistical data analysis to improve the process window.
  • Literature review to provide device team novel device structures.

Senior Engineer

Young Optics Inc.
Hsinchu, Taiwan
10.2018 - 06.2021
  • 3 Years of extensive experience working in Class 100 cleanroom.
  • Design and Fabrication of various Optical Coatings, such as AR, Filter, Half Mirror using IAD, and Sputtering.
  • Single-handedly achieved 'New Process Introduction and Development' of Hard Coating by dip-coating technique.
  • Promoted as DRI for Coating in the “New Product Development Business Unit” and handled one of the most critical project of the organization.
  • Successfully conducted FA and RCA using 'Fishbone' & other techniques for various process defects with extensive use of SEM, FIB, EDS, TEM, SIMS, AFM, XRD, etc.
  • DoE planning and executing countermeasures to yield-eating defects.
  • Experience in using Laser Interferometry tools (Dynafiz) for analyzing surface defects on the thin film surface.
  • Successfully completed product reliability tests for different test conditions and analyzed the data to evaluate process stabilization.
  • Responsible for IPQC and statistical data analysis of critical quality parameters
  • Mentored and coached a team of four entry-level and junior engineers to improve talent and boost skill levels.

Co-Founder and Undergraduate Laboratory Instructor

Delight Physics Lab.
Kolkata, West Bengal
08.2017 - 10.2018
  • Founded Delight Physics Lab. and gathered funding close to 3 million INR for setting up the laboratory.
  • Responsible for teaching bachelor’s students the concepts of different electronics experiments.
  • Guided students with making prototypes of different electronics gadgets and projects.

Education

Ph.D. - Electrical Engineering

National Taiwan University
Taipei, Taiwan
09.2021 - Current

Master of Science - Electronic Sciences

Jadavpur University
Kolkata, India
08.2016 - 08.2018

Bachelor of Science - Physics

University of Calcutta
Kolkata, India
05.2011 - 04.2016

Skills

Device Fabrication (Deposition, Photolithography, Etching, etc))

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Publications

1. Jih-Chao Chiu, Y uan-Ming Liu, Eknath Sarkar, Y u-Ciao Chen, Y u-Cheng Fan, Song-Ling Li, Ming-Xuan Lee Chia-Chun Yen, Tsang-Long Chen, Cheng-Hsu Chou, and C. W. Liu, "Electrical Properties of BCE Type Amorphous InGaZnO TFTs with Triple Layer Channels," Transactions on Electron Devices (TED). (Preparing to submit to TED)

2. Ming-Xuan Lee, Jih-Chao Chiu, Song-Ling Li, Eknath Sarkar, Yu-Ciao Chen, Chia- Chun Yen, Tsang-Long Chen, Cheng-Hsu Chou, and C. W. Liu, “Mobility Enhancement and Abnormal Humps in Top-Gate Self-Aligned Double-Layer Amorphous InGaZnO TFTs,” IEEE Journal of the Electron Devices Society, Vol. 10, pp. 301-308, Mar 2022.

3. Jih-Chao Chiu, Eknath Sarkar, Yuan-Ming Liu, Song-Ling Li, Ming-Xuan Lee, Yu- Ciao Chen, Chia-Chun Yen, Tsang-Long Chen, Cheng-Hsu Chou, and C. W. Liu, “Electrical Properties and Reliability Improvement of Amorphous InGaZnO Thin Film Transistors with Double Active Layers,” 2nd Symposium on Nano-Device Circuits and Technologies (SNDCT), Hsinchu, Taiwan, May 2022.

4. Jih-Chao Chiu, Eknath Sarkar, Yuan-Ming Liu, Song-Ling Li, Ming-Xuan Lee, Y u- Ciao Chen, Chia-Chun Yen, Tsang-Long Chen, Cheng-Hsu Chou, and C. W. Liu, “Negative Bias Illumination Stress on a-IGZO TFT with a Top Barrier,” 242nd ECS Meeting, Atlanta, GA, USA, October 9-13, 2022

Patent

Eknath Sarkar, Yichen Ma, Yu-Chieh Lee, C. W. Liu, “Quantum Efficiency Enhancement Using Central Ring/Square Scattering Technology in CMOS Image Sensors” (Accepted by PSMC) (Sept 2022, US Patent application ongoing).

Honors & Awards

  • Received 'Industry Sponsored Doctoral Talent Cultivation Scholarship' from Nanya Technology Corporation.
  • Received 'Outstanding International Student Scholarship' from National Taiwan University.
  • Received 'Taiwan Scholarship' from the Ministry of Education, Taiwan.
  • Awarded ' University Gold Medal' for standing first in the order of merit from Jadavpur University, India.

Courses

  • Physics of Semiconductor Devices

Grade: A+, Score: 98.125/100, GPA: 4.3/4.3.

  • From Fundamentals of Semiconductor Devices to Nanometer-Scale CMOS Transistors

Grade: A-, Score: 80/100, GPA: 3.7/4.3

  • Thin-Film And Flexible Electronics

Grade: A-, Score: 99.7/100, GPA: 4.3/4.3

  • Specialized Semiconductor Technology

Grade: A-, Score: 98/100, GPA: 4.3/4.3

References

Dr. Nikhil D Kalyankar, Senior Optical Engineer Panel Process & Optics

Apple Inc, USA, nkalyankar@apple.com , +1 (212) 945-8372


Po Hsun Chen, Senior Hardware Development Engineer

Apple Inc, Taiwan, phchen@apple.com, +886 963353856


Dr. Sanatan Chattopadhyay, Associate Professor & H.O.D

Department of Electronic Science, University of Calcutta, India, scelc@caluniv.ac.in, +91 94320 82727

Timeline

Process Development Intern

Nanya Technology Corporation
07.2022 - 08.2022

Graduate Research Assistant

National Taiwan University
09.2021 - Current

Ph.D. - Electrical Engineering

National Taiwan University
09.2021 - Current

Senior Engineer

Young Optics Inc.
10.2018 - 06.2021

Co-Founder and Undergraduate Laboratory Instructor

Delight Physics Lab.
08.2017 - 10.2018

Master of Science - Electronic Sciences

Jadavpur University
08.2016 - 08.2018

Bachelor of Science - Physics

University of Calcutta
05.2011 - 04.2016
Eknath SarkarGraduate Research Assistant