Summary
Overview
Work History
Education
Skills
Timeline
Generic
Hsieh Chin-AN

Hsieh Chin-AN

Pixel Engineer
Hsinchu

Summary

Accomplished Senior Pixel Engineer from EgisTec, adept in pixel layout design and TCAD simulation, significantly improved CP yield to over 95% and reduced the pixel photo layer. Expertise in semiconductor physics, complemented by strong teamwork abilities and effective project schedule control.

Overview

5
5
years of professional experience

Work History

N3 Junior Engineer

Tsmc
01.2020 - 10.2020

1. N3 process improvement

2. Transistor Device performance analysis & improvement

3. Transistor mismatch performance analysis & improvement

Senior Pixel Engineer

EgisTec
10.2020 - Current

1. Fab 1 Dtof SPAD pixel design

a. SPAD pixel layout design

b. SPAD pixel process simulation

c. SPAD pixel DC simulation (Vbd, Cac...)

d. SPAD pixel photon detection probability model

establishment & simulation

2. Fab 2 Dtof SPAD pixel design

a. SPAD pixel layout design

b. SPAD pixel process simulation

c. SPAD pixel DC simulation (Vbd, Cac...)

d. SPAD pixel photon detection probability model establishment & simulation

e. SPAD pixel jitter model establishment & simulation

f. Improve CP yield to > 95% from < 50%

3. Optical finger print 4T pixel design

a. 4T pixel layout design

b. 4T pixel testkey design

b. 4T pixel process simulation

c. 4T pixel DC simulation (Vt, Vpin, Vpotential...)

d. 4T pixel transient simulation (FWC, lag...)

e. 4T pixel photo layer reduction (cost down)




Education

M.D. - Electronic Engineering

NCTU
Hsinchu, Taiwan
04.2001 -

Bachelor of Science - Physical Education

CCU
Chiayi, Taiwan
04.2001 -

Skills

Semiconductor :

1 Pixel layout design

2 Synopsis TCAD process simulation

3 Synopsis TCAD electrical & transient simulation

4 Semiconductor Physics and Devices

5 Semiconductor Process

Computer skill:

TCL, matlab, Word, Excel, PowerPoint

Interpersonal skill :

Communication, Teamwork Ability, Project Schedules Control

Language :

English : TOEIC 745 / 990

Timeline

Senior Pixel Engineer

EgisTec
10.2020 - Current

N3 Junior Engineer

Tsmc
01.2020 - 10.2020

M.D. - Electronic Engineering

NCTU
04.2001 -

Bachelor of Science - Physical Education

CCU
04.2001 -
Hsieh Chin-ANPixel Engineer