Summary
Overview
Work History
Skills
Relevant Highlights
Timeline
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Jesse Kuo

Jesse Kuo

ATE Test Engineer / IC Test & Validation Engineer

Summary

10 years of experience in semiconductor testing, primarily utilizing Teradyne ATE platforms (UltraFlex, UltraFlex Plus, J750), encompassing: Hardware maintenance and debugging: Proficient in troubleshooting and repairing test systems to ensure optimal performance. System-level understanding: Deep familiarity with the architecture and operation of ATE systems. Test program development: Expertise in creating and optimizing test programs to meet specific testing requirements. Production support: Providing ongoing support during manufacturing to address and resolve any testing issues promptly. Data analysis and yield improvement: Analyzing test data to identify trends and implement strategies to enhance yield. Automation: Skilled in automating test processes to increase efficiency and reduce manual errors. Collaboration: Effective communication and teamwork with R&D, QA, FAE, vendors, and customers to deliver scalable test solutions and resolve complex device-level issues under tight deadlines.

Overview

9
9
years of professional experience
2
2
Languages

Work History

Manufacturing Test Engineer

Wipro (Contractor at NVIDIA)
08.2025 - Current
  • Directly reported to NVIDIA leaders, with full ownership of validation and test development responsibilities.
  • Develop and execute server-level test workflows leveraging Linux environments for validation and diagnostics.
  • Implement and optimize automated test scripts to improve efficiency, reproducibility, and coverage.
  • Collaborate with cross-functional teams (HW validation, system engineers, and vendors) to ensure test plan alignment and rapid issue resolution.
  • Support NPI introduction by integrating test procedures into mass-production readiness.
  • Troubleshoot system-level issues across DUT nodes, communication modules, and power delivery subsystems.

Manufacturing Engineer

DIS (Joint Venture of Teradyne and Technoprobe)
05.2024 - 08.2025
  • Lead test solution integration for IC packaging & final test using UltraFlex
  • Implement test plans, analyze data, tune test stability
  • Validate system performance, troubleshoot device-level issues
  • Provide customized ATE architecture, ensure NPI to MP transition

Manufacturing Engineer / Field Application Engineer

Teradyne
05.2021 - 05.2024
  • Develop/debug/deploy ATE programs on Ultra Flex/Ultra Flex Plus
  • Perform yield enhancement and root cause analysis
  • Maintain ATE systems, instrumentation, and calibration
  • Automate reporting and analysis using VBA/Macro tools
  • Liaison between R&D, FAE, and customer engineers
  • Lead test correlation and failure mode debugging

Senior Test Engineer

KYEC (King Yuan Electronics Co., Ltd.)
08.2016 - 05.2021
  • Maintain and repair Teradyne J750/UltraFlex ATE systems
  • Conduct board-level circuit debugging and component replacement
  • Monitor/debug MTK production yield
  • Validate test programs and integrate FT processes
  • Author technical reports and improvement proposals
  • Support production continuity by troubleshooting handlers, probers, sockets

Skills

  • ATE Platforms: Expertise in Teradyne UltraFlex, UltraFlex Plus, J750
  • Test Program Development: Skilled in new product introduction (NPI), signal integrity tuning, and test correlation
  • Hardware Troubleshooting: Load-board repair, schematic interpretation, instrument maintenance
  • Yield & Data Analysis: Top item analysis in mass-production products, identifying root causes, and effectively utilizing analytical tools
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Relevant Highlights

  • Automation & Test Development: We developed and customized test programs on Teradyne UltraFlex/UltraFlex Plus/J750 platforms, using Excel VBA to automate data acquisition, analysis, and reporting.
  • Hardware Test & Debugging: Hands-on experience in load-board repair, hardware calibration, instrumentation debugging (oscilloscope, multimeter), and system performance tuning.
  • Device Characterization & Data Analysis: Evaluated device performance and supported yield improvement initiatives (Bin Pareto analysis, trend tracking, root-cause identification) during NPI and mass-production phases.
  • Cross-Functional & Vendor Collaboration: Collaborated with R&D, QA, FAE, external vendors, and customers to validate metrology systems, improve test stability, and refine test protocols.
  • Delivery Under Tight Schedules: Proven ability to diagnose and resolve device-level test issues under time pressure, ensuring on-time production ramp-up and product launches.

Timeline

Manufacturing Test Engineer

Wipro (Contractor at NVIDIA)
08.2025 - Current

Manufacturing Engineer

DIS (Joint Venture of Teradyne and Technoprobe)
05.2024 - 08.2025

Manufacturing Engineer / Field Application Engineer

Teradyne
05.2021 - 05.2024

Senior Test Engineer

KYEC (King Yuan Electronics Co., Ltd.)
08.2016 - 05.2021
Jesse KuoATE Test Engineer / IC Test & Validation Engineer