

Although not formally trained as an electrical engineer, I have gained significant hands-on experience in IC layout and semiconductor manufacturing processes. Detail-oriented IC Layout Engineer with 4+ years of experience in high-performance SerDes layout design and project coordination. Skilled in optimizing layout performance, reducing power and area consumption, and leading cross-functional collaboration. Experienced in working with leading global semiconductor foundries including TSMC, XFAB, SMIC, VIS, and GF. Hands-on experience with ICs for LED drivers, microcontrollers (MCUs), current sensors, optical transmission, magnetic switches, and motion sensors. Gained deep understanding of various process nodes through practical work, developing strong problem-solving skills in real-world layout and fabrication challenges. Bilingual in Mandarin and English with a strong foundation in communication, adaptability, and customer service.
EDA Tools: Cadence Virtuoso, Calibre, Synopsys tools
Design Analysis: EM/IR Analysis, DRC/LVS Verification
Layout Techniques: Analog, Custom Digital, SerDes, Power pcells
Process Nodes: 3nm, 5nm, 7nm, 011μm, 013μm, 015μm, 018μm
Foundry Experience: TSMC, XFAB, SMIC, VIS, GlobalFoundries (GF)
IC Applications: LED Driver ICs, MCUs, Current Sensors, Optical Transmission, Magnetic Switches, Motion Sensors
Programming/Scripting: SKILL (basic), Python (basic)
Languages: Mandarin (Native), English (Professional Proficiency)
Japanese (Elementary), France (Elementary)
Core Competencies