Dynamic semiconductor engineer with over 10 years of extensive experience in front-end (Fab), backend packaging (WLCSP, Cu pillar, RDL,BGBM), and wafer processes. Expertise in process integration, yield enhancement, and supplier quality management has contributed to significant operational improvements. Proven leadership in multiple NPI programs, supplier qualifications, and cross-functional initiatives drives continuous advancement in technology and efficiency. Strong background in statistical analysis, defect reduction, and process cost optimization complements collaboration with OSATs, foundries, and material/equipment vendors throughout the semiconductor value chain.
Product Introduction Experience
Advanced Process Development
Supplier Qualification & Evaluation
Process Improvement & Yield Enhancement
Regularly monitor supplier performance metrics, including line yield, SPC, CpK, IQC, driving systematic improvements at Foundry and Bumping House.
Oversee the coordination and execution of annual audits, ensuring compliance, and support customer audits to uphold high-quality standards for suppliers.
Effective interpersonal communication