Summary
Overview
Work History
Education
Skills
Interests
Timeline
AccountManager
Neil Tsai

Neil Tsai

Senior Technical Deputy Manager
Zhubei City

Summary

Dynamic semiconductor engineer with over 10 years of extensive experience in front-end (Fab), backend packaging (WLCSP, Cu pillar, RDL,BGBM), and wafer processes. Expertise in process integration, yield enhancement, and supplier quality management has contributed to significant operational improvements. Proven leadership in multiple NPI programs, supplier qualifications, and cross-functional initiatives drives continuous advancement in technology and efficiency. Strong background in statistical analysis, defect reduction, and process cost optimization complements collaboration with OSATs, foundries, and material/equipment vendors throughout the semiconductor value chain.

Overview

10
10
years of professional experience
6
6
years of post-secondary education

Work History

Senior Techinical Deputy Manager

PowerX Semiconductor Corp.
04.2024 - 07.2025

Product Introduction Experience

  • Led mass production ramp-up for LED and power fuse module (PCBA), establishing end-to-end packaging process flow and release control
  • Successfully launched TVS SSP into mass production, completing design validation, prototype, and pilot production
  • Replaced traditional sputtered FSM with electroless plating (chemical Ni/Pd/Au), achieving successful trial build and material cost reduction

Advanced Process Development

  • Co-developed non-Taiko BGBM process with supplier and released into mass production with qualified electrical and reliability results
  • Designed and implemented BSM pattern process using non-lithographic methods, improving electrical path uniformity and structural consistency

Supplier Qualification & Evaluation

  • Drove new product development through collaborative package design and technical requirement alignment with OSAT and internal teams
  • Defined and validated packaging process specifications with suppliers to meet manufacturing and reliability standards
  • Managed NPI-to-MP documentation deliverables including BD, BOM, POD, and detailed process specs
  • Introduced and qualified suppliers for PI, FSM, chemical Ni/Pd/Au, BGBM, and wafer saw; managed technical transfer and risk mitigation during ramp
  • Supported SQE-led pre-production audits to validate process readiness, stability, and yield performance

Process Improvement & Yield Enhancement

  • Resolved void issues in FSM process through DOE-based layout optimization and material stack tuning
  • Partnered with suppliers to enhance wafer-level MOSFET packaging process, improving yield from 95% to 98% and reducing defect rates
  • Optimized wafer saw conditions to reduce mechanical damage, lowering yield loss from >5% to

Supplier Quality Manufacturing Senior Engineer

uPI Semiconductor Corp.
12.2019 - 04.2024
  • CAR Leadership for Quality Issues:
    1.Spearhead the completion of Corrective Action Reports (CAR) addressing quality concerns with Foundry/Bumping house suppliers.
    2.Identify root causes and orchestrate effective actions for sustainable quality enhancement.
  • Product Quality Review:
    Conduct comprehensive product quality reviews, encompassing manufacturing metrics, inline process control, Statistical Process Control (SPC), line yield, and Failure Mode and Effect Analysis (FEMA) at foundries and Bumping houses.
  • CIP Task Force:
    Actively contribute to Continuous Improvement Process (CIP) task forces, driving initiatives that enhance operational efficiency and elevate product quality standards.
  • New Supplier Evaluation :
    Lead the assessment of new suppliers , ensuring a robust evaluation process and successful integration.
  • Failure Analysis and Corrective Action:
    Direct failure analysis efforts and corrective actions in collaboration with vendors (foundry), taking charge of Return Merchandise Authorization (RMA) processes.
  • Supplier Performance Monitoring:

Regularly monitor supplier performance metrics, including line yield, SPC, CpK, IQC, driving systematic improvements at Foundry and Bumping House.

  • Audit Management:

Oversee the coordination and execution of annual audits, ensuring compliance, and support customer audits to uphold high-quality standards for suppliers.

Chemical Mechanical Planarization Engineer

Powerchip Semiconductor Manufacturing Corp.
11.2018 - 12.2019
  • Achieve a cost reduction about 2% of slurry for mass production.
  • Evaluate new parts and process conditions to improve uniformity performance from 15% to 10 or less.
  • Decrease troubleshooting rate about 3% by analyzing data and implementing measures properly.

Process Integration Engineer

ChipMOS Technologies Inc.
11.2016 - 11.2018
  • Led NPI for RDL, WLCSP, and Cu pillar products; compiled FMEA and defined packaging design rules
  • Standardized production processes, reducing cycle time by ~10% and decreasing customer complaint rate from 10% to 3%
  • Coordinated across departments for technology roadmap development and issue resolution

Research & Development Engineer

ChipMOS Technologies Inc.
09.2015 - 11.2016
  • Introduced new photoresist materials for advanced packaging
  • Collaborated with vendors on chemical resistance and reliability testing
  • Evaluated new equipment and developed corresponding process recipes, OCAPs, and documentation

Education

Master Degree - Chemical Engineering

National United University
01.2013 - 01.2015

Bachelor Degree - Chemical Engineering

National United University
01.2010 - 01.2013

Skills

Effective interpersonal communication

Interests

Reading, Traveling, Photography

Timeline

Senior Techinical Deputy Manager

PowerX Semiconductor Corp.
04.2024 - 07.2025

Supplier Quality Manufacturing Senior Engineer

uPI Semiconductor Corp.
12.2019 - 04.2024

Chemical Mechanical Planarization Engineer

Powerchip Semiconductor Manufacturing Corp.
11.2018 - 12.2019

Process Integration Engineer

ChipMOS Technologies Inc.
11.2016 - 11.2018

Research & Development Engineer

ChipMOS Technologies Inc.
09.2015 - 11.2016

Master Degree - Chemical Engineering

National United University
01.2013 - 01.2015

Bachelor Degree - Chemical Engineering

National United University
01.2010 - 01.2013
Neil TsaiSenior Technical Deputy Manager