Summary
Software
Work History
Education
Skills
Accomplishments
Timeline
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Po Hsien Yu

Po Hsien Yu

Hardware Engineer
Taipei

Summary

Efficient and dedicated Hardware Engineer with 8+ years of experience in digital ic design, firmware, and system architecture, and 2+ years of experience in deep learning and computer vision. Resourceful professional offering skills in complex problem resolution involving synthesis, testing and root cause.

Software

C / C / C#

Verilog

SystemVerilog

Python

Work History

Research And Development Engineer

Ganzin
New Taipei
09.2020 - Current
  • Built verified flow of FPGA.
  • Implemented system-level tools and firmware.
  • Solved complex problems in synthesis, testing and root causes.
  • Optimized existing formulation and processes to improve verified performance, process robustness and safety.

Internship Student

Raydium Semiconductor Corporation
HsinChu
06.2023 - 08.2023
  • Implemented de-noising model for touch sensors which improves 20 dB on PSNR and SNR.
  • Implemented architecture of deep learning accelerator.

Internship Student

Raydium Semiconductor Corporation
HsinChu
06.2022 - 08.2022
  • Implemented classification model for touch sensors, and achieve around 98% accuracy.
  • Designed architecture of deep learning accelerator.

Systems Engineer

Himax
Tainan
06.2017 - 05.2020
  • Performed root cause analysis to provide resolutions for production issues.
  • Collaborated with clients to determine need and devise appropriate software and hardware solutions.
  • Built verified flow of function of timing controllers on FPGA.
  • Monitored several TCON projects generating upwards of $1M per month.

Education

Ph.D. - Graduate Institute of Electronics Engineering

National Taiwan University
Taipei, Taiwan
09.2020 - Current

Master of Science - Electrical And Electronics Engineering

National Chiao Tung University
HsinChu, Taiwan
09.2014 - 10.2016

Skills

Effective Multitasking

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Accomplishments

  • Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty, Tsung-Yi Ho and Chen-Yi Lee, “Structural and Functional Test Methods for Micro-Electrode-Dot-Array Digital Microfluidic Biochips,” in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 37, no. 5, pp. 968-981, May 2018.
  • Zipeng Li, Kelvin Yi-Tse Lai, John McCrone, Po-Hsien Yu, Krishnendu Chakrabarty, Tsung-Yi. Ho, Miroslav Pajic and Chen-Yi Lee, ”Efficient and Adaptive Error Recovery in a Micro-Electrode-Dot-Array Digital Microfluidic Biochip,” in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 37, no. 3, pp. 601-614, March 2018.
  • Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty, Tsung- Yi Ho and Chen-Yi Lee, ”Droplet Size-Aware High-Level Synthesis for Micro-Electrode-Dot-Array Digital Microfluidic Biochips,” in IEEE Transactions on Biomedical Circuits and Systems, vol. 11, no. 3, pp. 612-626, June 2017.
  • Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty, Miroslav Pajic, Tsung-Yi Ho and Chen-Yi Lee, “Error recovery in a micro-electrode-dot-array digital microfluidic biochip,” in 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Austin, TX, 2016, pp. 1-8.
  • Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty, Tsung-Yi Ho and Chen-Yi Lee, “Built-in self-test for micro-electrode- dot-array digital microfluidic biochips,” in 2016 IEEE International Test Conference (ITC), Fort Worth, TX, 2016, pp. 1-10.
  • Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Tsung-Yi Ho, Krishnendu Chakrabarty and Chen-Yi Lee, “High-level synthesis for micro-electrode-dot-array digital microfluidic biochips,” in 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC), Austin, TX, 2016, pp. 1-6.
  • Yau, Her-Terng, Yu, Po-Hsien, and Su, Yuan-Hung, “Design and
    Implementation of Optimal Fuzzy PID Controller for DC Servo Motor,” in Applied Mathematics & Information Sciences, vol. 8, no. 1L, pp. 231-237, 2014.

Timeline

Internship Student

Raydium Semiconductor Corporation
06.2023 - 08.2023

Internship Student

Raydium Semiconductor Corporation
06.2022 - 08.2022

Research And Development Engineer

Ganzin
09.2020 - Current

Ph.D. - Graduate Institute of Electronics Engineering

National Taiwan University
09.2020 - Current

Systems Engineer

Himax
06.2017 - 05.2020

Master of Science - Electrical And Electronics Engineering

National Chiao Tung University
09.2014 - 10.2016
Po Hsien YuHardware Engineer