Summary
Education
Skills
Research Projects
Timeline
Generic
Qian-Yu Yi

Qian-Yu Yi

Tainan

Summary

Master's student in Mechanical Engineering at STUST, focusing on MEMS thin-film gas sensors, semiconductor micro-fabrication, and materials characterization. Experienced in cleanroom processes (trained at TSRI), sensor characterization, and hardware layout integration, backed by National Technician (Level B & C) and Siemens CSEA drafting certifications, with findings recognized by a First-Author SCI publication and an ISAT-24 presentation award in Japan.

Education

M.S. - Mechanical Engineering

Southern Taiwan University of Science and Technology
Tainan, Taiwan
2025 - Current

B.S. - Mechanical Engineering

Southern Taiwan University of Science and Technology
Tainan, Taiwan
2022 - 2025

Skills

Design & Spatial Layout

  • 2D/3D Precision Drafting, Tolerance Design, 3D CAD Modeling
  • Software: AutoCAD, Inventor, Solid Edge

Semiconductor Micro-Fabrication

  • Thin-Film Deposition: Magnetron Sputtering, PECVD
  • Patterning & Etching: Photolithography (Contact Aligner), Dry Etching (ICP-RIE), Wet Etching
  • Cleanroom Protocol, Packaging & Testing Methodologies

Certifications & Professional Training

  • Siemens Solid Edge Certified Associate (CSEA)
  • Level B & C Technician: Computer-Aided Mechanical Drafting (Ministry of Labor, Taiwan)
  • Level C Technician: Computer-Aided 3D Solid Modeling (Ministry of Labor, Taiwan)
  • Cleanroom & Advanced Processing Equipment Training Certificate (20 Hours) (Taiwan Semiconductor Research Institute, TSRI)
  • Semiconductor Packaging & Testing Competency Certificate (MEIMING Tech, Taipei Tech & NKUST Collaboration)

Research Projects

Next-Generation Low-Power MEMS Gas Sensor Development

Apr 2024 – Aug 2026

  • Micro-Fabrication & Cleanroom Operations: Completed full micro-fabrication cycles for MEMS sensor chips, including photolithography (coating, alignment, exposure, development), wet etching, and ICP dry etching for oxide/metal layers.
  • Thin-Film Deposition: Operated PECVD for oxide layer deposition and magnetron sputtering for functional metal and metal-oxide thin films.
  • Module Integration & Circuit Verification: Designed physical layout integration between sensor chips and peripheral interface circuits, ensuring low-noise signal transmission and mechanical stability.

Timeline

B.S. - Mechanical Engineering

Southern Taiwan University of Science and Technology
2022 - 2025

M.S. - Mechanical Engineering

Southern Taiwan University of Science and Technology
2025 - Current
Qian-Yu Yi