Summary
Work History
Education
Skills
Timeline
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Sung Pin-Hsuan

Sung Pin-Hsuan

Application Engineer
Hsinchu County

Summary

Application Engineer with over 7 years of experience in physical verification at Synopsys, specializing in IC Validator (ICV) to deliver DRC runset for TSMC advanced technology nodes. Strong collaboration with TSMC on custom flows, correlation testing, and advanced feature enablement. Skilled in standardizing development processes, flow integration and automation.

Work History

Application Engineering Staff Engineer

Synopsys
03.2018 - Current
  • Develop IC Validator(ICV) DRC runset for TSMC N6, N7, N12, N16, N22, T000 technology.
  • Support MediaTeck CAD team on ICV customized DRC/FILL runset.
  • Standardize runset development and polish QC flow to reduce manual effort and development period.
  • ICC2-ICV correlation verification on N3 test chip
  • Assist with N2 Dummy Fill macro-system automation
  • Lead a team to DRC/FILL flow integration and automation from 2023.

Intern

MediaTek
07.2014 - 08.2014
  • Improve CAD flow for automatic placement and routing by writing Perl and TCL scripts.
  • Design a floorplanner that takes the wire overlapping cost into consideration.

Education

Master - Computer Science

National Tsing Hua University
Hsinchu
04.2001 -

Bachelor - Computer Science

National Tsing Hua University
Hsinchu
04.2001 -

Skills

Programming languages: C/C

Timeline

Application Engineering Staff Engineer

Synopsys
03.2018 - Current

Intern

MediaTek
07.2014 - 08.2014

Master - Computer Science

National Tsing Hua University
04.2001 -

Bachelor - Computer Science

National Tsing Hua University
04.2001 -

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Sung Pin-HsuanApplication Engineer