Szu-Hsi Chen

Digital IC Designer at MediaTek with expertise in IEEE 802.3 PCS integration and ECC IP implementation. Proven ability to collaborate effectively with cross-functional teams, delivering innovative hardware architectures that meet PPA criteria. With a strong focus on achieving high-quality hardware design.

- Graduate Courses -
National Yang Ming Chiao Tung University:
1. Integrated Circuit Design Laboratory

National Tsing Hua University:
1. Digital Communication Integrated Circuits Design
2. Application Acceleration with High-Level Synthesis
3. Timing Circuit Designs & Applications
4. Wireless Communications Systems
5. Mathematical Methods for Communications
6. Machine Learning

- Undergraduate Courses -
National Central University:
1. Digital System Design and Implementation
2. Introduction to VLSI
3. Digital Design
4. Digital Logic Circuit Laboratories
5. Digital Signal Processing
6. Signals and System
7. Electronics
8. Electrical Circuits
9. Introduction to Computer
10. Computer Organization

■ Master's Thesis (End-to-End SoC Design)
1. Use ZCU-102 FPGA to implement a end-to-end tensor generalized iterative soft-thresholding reconstruction system

■ Integrated Circuit Design Laboratory (ASIC Design Flow)
1. System verilog
2. DesignWare
3. Design compiler
4. Innovus
5. Advanced microcontroller bus architecture
6. Cross clock domain design
7. Low power design

■ Digital Communication Integrated Circuits Design (ASIC Design Flow)
1. OFDM receiver
2. 2x2 MIMO detector

■ Application Acceleration with High-Level Synthesis (High-Level Synthesis)
1. Use high-level synthesis to implement a simple MIMO commucation system with encrypt/decrypt function and use the U50 accelerator card to validate.

■ Digital Logic Circuit Laboratories (FPGA Implementation)
1. Counter
2. Finite state machines
3. Frequency divider
4. VGA controller

■ Computer Organization (ASIC Design Flow)
1. MIPS CPU

Use FPGA, Raspberry Pi and several sensor(sound, infrared, gyroscope... etc ) to implemet a robot for rescue. The project utilizes sensor inputs and signal processing methods to drive motors to perform several tasks.

Demo video: https://www.youtube.com/watch?v=e_1KIpMQ6A8

Teaching assistant experience:
1. 2022.2~2022.6 serve as Logic Design Laboratory TA in National Tsing Hua University
2. 2022.9~2023.1 serve as Digital Signal Processing Integrated Circuits Design TA in National Tsing Hua University

Extracurricular experience:
1. President of NCUEE student association
2. Team leader of NCUEE badminton team
3. Members of NCU hot music club

The tensor compressive sensing architecture for THz single-pixel imaging system was published at the 2023 International Conference on Infrared, Millimeter and Terahertz Waves (IRMMW-THz).

Link: https://ieeexplore.ieee.org/abstract/document/10299052