Summary
Overview
Work History
Education
Skills
Software
Languages
Timeline
Generic
Wei Tsan Hung

Wei Tsan Hung

Assembly NPI Engineer
Taichung City,TXG

Summary

I have five years of experience as a assembly stacking process engineer at Micron, focusing on the implementation of new processes and the execution of yield improvement projects. I possess expertise in die bonding, which allows me to effectively assess process and equipment improvements to enhance yield, successfully increasing the yield of IQP products from 0% to 96%. I also have strong teamwork skills and collaborate with HVM and R&D teams to ensure the smooth mass production of new products for clients. Additionally, I am motivated and use my weekends to pursue an in-service master's degree at National Chung Hsing University.

Overview

5
5
years of professional experience
7
7
years of post-secondary education

Work History

Assembly NPI Engineer

Micron Semiconductor
08.2019 - Current

Introduction of new products from the development stage to HVM and improvement of product yield.

  • Production documentation: Manufacturing SOPs, process OCAP, equipment conversion checklist.
  • Product quality control: Evaluation and definition of FDC and SPC system specifications, assisting in the automation development for manual quality verification.
  • Process capability and yield enhancement: Adjustment of process parameters, evaluation, and setup of new machines, and software upgrades for equipment.

Projects:

  • HBM3 plus IQP yield improved from 0% to 96%.

Due to changes in warpage performance of the HBM3 cube and interposer die, the original process is no longer applicable. Interposer to substrate joint capability was enhanced by changing the flux dipping depth (38um to 50um). While cube transitioned from reflow process to TCB process to overcome the edge non-wet issue.

  • Development of new IQP machine for process improvement from other site.

Collaboration with KEG for Equipment Development. Tansitioning manual operation machine to machine which can auto run for production, and establishing a new process profile for the new equipment.

  • Stacking process owner for tack bond.

Inline yield improvement: Lowered die placement scrap rate by modifying the machine speed ratio.

Stacking issue improvement: Set up FDC chart to detect double die issues. Collaborated with EE for a software upgrade to enable early detection of double die pick-up from the machine.

  • Development of Systematic Quality Verification.

Assisted in the development of measurement equipment and ADC systems to upload quality verification results to the SPC system, enabling automatic assessment of machine quality for production qualification, replacing manual judgment.


Education

Master of Engineering - Materials Engineering

National Chung Hsing University
Taichung, Taiwan
09.2022 - 06.2025

Bachelor of Engineering - Chemical And Materials Engineering

Tamkang University
New Taipei, Taiwan
09.2015 - 06.2019

Skills

Process Engineering

Software

Word

Power point

Excel

JMP

Languages

Chinese (Mandarin)
Native language
English
Upper intermediate
B2

Timeline

Master of Engineering - Materials Engineering

National Chung Hsing University
09.2022 - 06.2025

Assembly NPI Engineer

Micron Semiconductor
08.2019 - Current

Bachelor of Engineering - Chemical And Materials Engineering

Tamkang University
09.2015 - 06.2019
Wei Tsan HungAssembly NPI Engineer