Overview
Work History
Education
Skills
Personal Information
Timeline
Generic
William HSIN

William HSIN

Senior Engineer
New Taipei City

Overview

5
5
years of professional experience
6
6
years of post-secondary education

Work History

應用工程師

奇景光電
11.2022 - Current

1. LTDI(Large Touch Driver IC)

  • Schematic Review
  • COB/Jig design
  • SI Review
  • Layout Review
  • Initial code compilation(I2C I/F)
  • visual effects analysis
  • System Issue analysis
  • High-speed signal analysis and verification(ISP:integrated-Stream Protocol)
  • ESD analysis and verification

2. TDDI(Touch Display Driver IC)

  • Schematic Review
  • COB/Jig design
  • SI Review
  • Layout Review
  • Initial code compile(I2C I/F)
  • visual effects analysis
  • System Issue analysis
  • High-speed signal analysis and verification(ISP:integrated-Stream Protocol)
  • EMI analysis(AM/FM)
  • ESD analysis and verification

3. OLED(Organic Electroluminescence Display)

  • FPGA verification
  • OSD(On Screen Display) application and verification
  • HW RST verification
  • Dual VDD, Dual I/O verification

4. Training materials compilation


iSP(integrated-Stream Protocol)

  • Overview
  • structure
  • data arrangement
  • error flag
  • experience sharing


PLL(phase lock loop)

  • Overview
  • negative feedback circuit
  • PFD
  • Charge pump
  • VCO
  • experience sharing


Impedance matching

  • resistance
  • reactance
  • capacitance and inductance
  • PCB stack
  • eye diagram
  • S parameter
  • TDR
  • experience sharing

硬體工程師

和碩聯合科技股份有限公司
07.2020 - 06.2022

2020.7 ~ 2020.11 AIO(RFQ) Rocket Lake

  • I/O board design(Audio Jack、USB 3)
  • Layout guidance
  • RFQ Proposal(Placement, Layout, Topology, Power consumption)
  • Electronic properties creation of component

2020.12 ~ 2021.4 AIO(DVT~MP) Dali

  • System Issue Analysis
  • BOM management
  • Signal verification and analysis

2021.4 ~ 2021.8 NCU (RFQ) Alder Lake P

  • Power lane simulation and analysis
  • Layout guidance
  • Layout review
  • Schematic maintenance

2021.8 ~ 2022.6 NCU (DVT~MP) Alder Lake S

  • Layout review
  • Schematic maintenance
  • System issue analysis

Education

Master of Science - 物理系

中央大學
物研所
09.2016 - 01.2019

Bachelor of Science - 物理系

東華大學
09.2012 - 06.2016

Skills

Orcad

Allegro

Pads

Oscilloscope

Spectrum Analyzer

Personal Information

  • Age: 32
  • Gender: Male

Timeline

應用工程師

奇景光電
11.2022 - Current

硬體工程師

和碩聯合科技股份有限公司
07.2020 - 06.2022

Master of Science - 物理系

中央大學
09.2016 - 01.2019

Bachelor of Science - 物理系

東華大學
09.2012 - 06.2016
William HSINSenior Engineer