Woody Wu (巫宗鴻)

1. Third party SoC project assist(RISC-V)

2. Bug Jira handling

3. New feature developing

4. Build auto/remote environment for developing

• Reviewed plans, documents and related materials to assess projected actions and advise on changes.
• Trained staff members and improved engineering application processes.
• Gen 5x4 PCIe SSD performance tuning.
• Involve SSD Architecture design with Architect
• Co-work withe IP designer to identify HW issues
• Shutdown/Boot Up process
• RTOS
• FTL Algorithm/Architecture design
• Device QoS

• Developed RAID design
• Improve latency/throughput issues.
• Design and implement firmware debugging system
• Coding based on triple core CPU architecture.
• Control temperature sensor, PLP IC through I2C.
• GPIO rise and fall design for HW debug.
• SPI control for NOR flash program/erase/read/id
• DRAM DLL sweep