Reading
Jian-Tzu Yeh
SerDes Analog Designer
XindianDist., New Taipei City, Taiwan
Summary
High speed interface SerDes RX design with over 4 years of experience specializing in RDC Analog Circuit Design 2(ACD2) department for RTK Semiconductor. I can complete a DFE design individually, from pure analog circuit to adaptation algorithm control.
Overview
4
4
years of professional experience
7
7
years of post-secondary education
Work History
Senior Engineer
Realtek Semiconductor
10.2020 - Current
- Sub-block Decision Feedback Equalizer Design
- Circuits Integrated - HDMIRX/DPRX/USBRX
- Co-sim RX A+D loop function(e.g. Offset-calibration, DFE Adaptation) by Verilog/AMS
Education
Master’s Degree - Graduate Institute of Electronics Engineering
National Taiwan University
Taipei, Taiwan 09.2017 - 07.2020
Bachelor’s Degree - Department of Electronic And Computer Engineering
National Taiwan University of Science & Technology
Taipei, Taiwan 09.2013 - 06.2017
Skills
Cadence Virtuoso
Synopsys Hspice
RTL-coding
Interests
Running
Playing Piano
Timeline
Senior Engineer
Realtek Semiconductor
10.2020 - Current
Master’s Degree - Graduate Institute of Electronics Engineering
National Taiwan University
09.2017 - 07.2020
Bachelor’s Degree - Department of Electronic And Computer Engineering
National Taiwan University of Science & Technology
09.2013 - 06.2017
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