Overview
Work History
Education
Skills
Accomplishments
Timeline
Generic
YU HUSAN KAO

YU HUSAN KAO

Senior Package Integration Engineer

Overview

7
7
years of professional experience
6
6
years of post-secondary education
2
2
Languages

Work History

Senior Package Integration Engineer

Micron Memory Technology (Taiwan Micron - Taichung)
Taichung
01.2020 - Current

Job Function

  • DFMEA account in Micron advance package team
  • EFA/PFA Analysis in Assembly/BEOL/Device Level
  • Wafer Probe/Back end test software bin/hardware bin analysis
  • WAT (In-line/Final Param) data analysis
  • Electrical Yield Analysis / In-line Data Analysis
  • Process Enhancement by DOE (Screen DOE, Factorial experiment)
  • Package reliability

Senior Customer Engineering Integration (NPI)

ASE ChungLi
Taoyuan
10.2015 - 01.2020
  • NPI account for international semiconductor customer.
    (Qualcomm, Ambarella, Synaptics, Sitime, Analog Device, Onsemi...etc.)
  • Support customer to develop NPI project from design (Substrate/lead frame/bond diagram) to mass production.

Education

Master - Chemical Engineering

National Taiwan University
Taiwan Taipei
09.2013 - 09.2015

Bachelor - Chemical Engineering

National Taiwan University
Taiwan Taipei
09.2009 - 09.2013

Skills

    PFMEA/DFMEA of advance/traditional assembly package

3D Packaging (TSV) Process / Post Wafer Finishing Process (Bumping) know how

EFA/PFA Analysis in Assembly/BEOL/Device Level

Wafer Probe/Back end test software bin/hardware bin analysis

WAT (In-line/Final Param) data analysis

Layout review and pulling skill (K2 viewer/Cadence Virtuoso)

8D/KT Problem Solving

JMP, Linux/Unix, Git/Gitbucket

Backend Electrical Yield Analysis / In-line Data Analysis

Process Enhancement by DOE (Screen DOE, Factorial experiment)

Package reliability

Wire bond / Flip Chip / SiP assembly packaging process (L/F base and Substrate base)

APQP/NPI procedure complied with VDA63/IATF16949

Automotive package

6 Sigma Green Belt (Understanding to CpK/DMAIC flow and procedure)

Overseas Residing supporting experience at Sunnyvale (California Silicon Valley)

Substrate/Lead frame design and manufacturing flow

Demonstrated respect, friendliness and willingness to help wherever needed

Excellent communication skills, both verbal and written

Skilled at working independently and collaboratively in a team environment

Accomplishments

  • Help customer to pass Apple audit to get project successfully qualified.
  • Help on develop several Automotive NPI product, successfully qualification pass and mass production.
  • Improve and drive Micron HBM2e yield from 50% to over 95% in assembly yield wise.
  • Resolve several line down issue in HBM3 development, help team up and work on root cause clarification to problem resolution.

Timeline

Senior Package Integration Engineer

Micron Memory Technology (Taiwan Micron - Taichung)
01.2020 - Current

Senior Customer Engineering Integration (NPI)

ASE ChungLi
10.2015 - 01.2020

Master - Chemical Engineering

National Taiwan University
09.2013 - 09.2015

Bachelor - Chemical Engineering

National Taiwan University
09.2009 - 09.2013
YU HUSAN KAOSenior Package Integration Engineer