Yu Yu Liu
Staff R&D Engineer
Summary
Experienced software engineer with a strong track record of developing and optimizing complex systems in a Linux environment. Collaborative approach to working with international teams to integrate new features, enhance performance, and ensure code quality. Proficient in C++ development, version control tools, and automation scripting. Proven expertise in performance optimization and software development. Skilled at identifying and resolving performance bottlenecks, resulting in significant speed improvements. Effective communication skills with engineers from diverse backgrounds, contributing to the successful completion of large-scale projects.
Overview
6
6
years of professional experience
Work History
Staff R&D Engineer
Synopsys
3 2022 - Current
- Zebu Runtime Software Development: Enhanced Zebu's runtime environment by developing and refining the debug methodology tool to support diverse scenarios
- Zebu Profiler Tool Development: Developed zTune, a performance profiling tool for Zebu, leading to significant insights into performance bottlenecks
- ZDPI Enhancement: Developed zDPI, a solution to accelerate the invocation of C/C++ functions in Verilog, resulting in a notable increase in throughput
- Performance Analysis & Optimization: Analyzed performance bottlenecks and implemented proof-of-concept enhancements, including the proposal and development of the Synopsys Purple Poster approach, achieving a 2x speed-up in throughput
- Cross-Functional Collaboration: Worked with various R&D teams to integrate new software features, including waveform annotation and production support
- Ensured features met high standards and addressed issues through practical solutions
- Code Quality Maintenance: Ensured code quality using tools such as Coverity and clang-tidy.
Junior Software Engineer
Avery Design System
12.2018 - 10.2021
- GUI Application Development: Designed and developed a GUI application using Qt for a customized database
- Circuit Simulation Tools: Developed and extended features for circuit simulation tools using C and Verilog interface libraries
- License Management: Contributed to the development of a license management library using FlexLM
- Server Maintenance: Managed and maintained internal NIS, NFS, and Bugzilla servers to support internal operations.
Education
Master of Science - Electrical Engineering And Computer Science
National Taiwan University
Taipei 04.2001 -
Bachelor of Science - Electrical Engineering
National Cheng Kung University
Tainan 04.2001 -
Skills
Project management tool
Runtime debug tool
Profiler
Script for automation
Problem-Solving
Product Development
Effective Communication
Teamwork and Collaboration
Languages
Chinese (Mandarin)
Native language
English
Advanced
C1
Timeline
Junior Software Engineer
Avery Design System
12.2018 - 10.2021
Master of Science - Electrical Engineering And Computer Science
National Taiwan University
04.2001 -
Bachelor of Science - Electrical Engineering
National Cheng Kung University
04.2001 -
Staff R&D Engineer
Synopsys
3 2022 - Current
Similar Profiles
Jixiang DingJixiang Ding
Senior ASIC Verification Engineer at SynopsysSenior ASIC Verification Engineer at Synopsys
Elin IssaviElin Issavi
Sr. Event Manger at SynopsysSr. Event Manger at Synopsys
Sai Vivek PidaparthiSai Vivek Pidaparthi
Associate Network Engineer at SynopsysAssociate Network Engineer at Synopsys