Summary
Skills
Work History
Education
pattern
Overview
SoftwareDeveloper

Yu-Sung Chen(Alex Chen)

System HW Of Ethernet Switch/ SI Engineering
Hsinchu,Taiwan

Summary

11 Years HW design experience in ethernet switch including datacenter and enterprise, familiar with hardware design flow, SI/PI simulation flow and tool, success in making products from prototype into volume production.

Skills

IC level PKG design, including Ball MAP arrangement, whole system (from Die, PKG, board level ) PI and SI budget specification and simulation

  • Hands-on hardware design experience with successful records from concept, achitecture, schematic, SI/PI simulation, component sections, Layout, Lab bring-up/debugging, prototype Validation, EMC compliance to production

High speed serdes system include 40G/100G/400G(Pam4)/800G(Pam4) Ethernet interface hardware design, SI/PI simulation, power converters and PCB layout techniques

Familiar with board level hardware Design, simulation and Layout Tools; OrCAD, PADS, Allegro, Siwave, POWER DC, HSFF 3D, Simplis

Familiar with high speed and high-power system Design process to reach both cost effective and performance

Familiar with hardware testing equipment; oscilloscope, Logic Analyzer, Spectrum Analyzer and Network Analyzer

Practical experiences in high layer count PCB datacenter switch product design

Business development, customer engagement and customer Issue debugging & support Experience

Excellent interpersonal communication, analytical, organizational, and problem-solving skills

Project Management and cross-functional team coordination

Flexibility and maturity to work in a dynamic and extremely fast-paced environment

Work History

Technical Manager

MEDIATEK INC,
HSINCHU, TW
02.2014 - Current
  • Responsible for package design of integrated chip, include ball map arrangement, providing routing rule, and running PI/SI simulation of PKG to check performance.
  • HW development of engineering platform for chip verification and system reference board for demo from 10G up to per lane 112G-pam4 Ethernet product.
  • Handling flow and environment set-up for HTOL.
  • Handling testing item and patterns of chip production.
  • Worked with cross function teams to define product hardware
    specifications, system verification.
  • High-Speed signal and timing clock jitter measurements and characterizations.
  • Write datasheet and HW Design Guide of product.
  • Schematic/Layout review, simulation report review and supporting system board debugging and TX FIR related tuning for ODM customers.

Senior Engineer

HIMAX TECHNOLOGIES, INC,
TAINAN, TW
01.2013 - 01.2014
  • Designed platform of LCD driver, programmable Gama and integrated power management chip and verify functionality of chip.
  • Define interface based on customers’ requirement, provide hardware solutions and participation in all product development life cycle from EVT, DVT, FA to MP for project design-win.

Senior Engineer

COMPAL COMMUNICATIONS INC.
TAINAN, TW
06.2012 - 12.2012
  • Android low level driver maintenance for mobile phone system
  • Supervising HW Circuit review; consultant in SW team to identify system problem category and assign issue to related Owner.
  • Responsible for cellphone manufacture testing yield rate analysis, coordinator between factory and design team.

Senior Engineer

ALPHA NETWORK INC.
HSINCHU, TW
10.2007 - 05.2012
  • System HW design for ethernet switch including enterprise Level (1G/10G/40G/POE), responsible for whole product life cycle from marketing concept, system hardware architecture, schematic design, layout, BOM selection, hardware design validation, compliance to production.
  • Chassis Control Plane Management Card HW Design for US. ODM customer, Responsible for hardware spec define, schematic design, layout, BOM, whole chassis validation, compliance and production.
  • High-Speed Serdes signal eye diagram measurements and characterizations.
  • Supervising PCB layout, fab, assembly and compliance certification activities.

Hardware Engineer

ASIA OPTICAL CO. INC.
HSINCHU, TW
12.2006 - 09.2007
  • System HW Design for Digital Camera
  • Participate in hardware development activities of architecture, schematic, layout, BOM, DVT/EVT, QA, EMC, and production.

Education

BS - Electrical and Control Engineering

National Chiao-Tung University
HsinChu, TW
09.2001 - 06.2005

pattern

Methods to Improve Remote Sense Compensation of PMIC to Multiple ICs/Components; US20160091915 A1, US9733661 B2, US20170300077 A1, CN106200736 A; Pub Date Aug. 15,2017; Chia-Tao Hsu, Chee-Kong Ung, Li-Chun Yang, Yu-Sung Chen, Ming-Tse Dai

Overview

15
15
years of professional experience
4
4
years of post-secondary education

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Yu-Sung Chen(Alex Chen)System HW Of Ethernet Switch/ SI Engineering